Specialized Accelerator for Matrix Operation in Robotic Controllers

As a typical operator in robotic control scenarios, matrix operations such as matrix multiplication and matrix inversion have significantly limited the performance of robotic controllers due to high complexity. To accelerate the matrix computation, this paper conducts parallel optimization of matrix algorithms and proposes a heterogeneous matrix computation accelerator which is dynamically reconfigurable for industrial robotic control scenarios involving matrix dimensions between 4 and 9. The design is prototyped on the Xilinx FPGA VCU128 evaluation board with a clock frequency of 250 MHz and synthesized using UMC 40 nm CMOS process at 0.99 V and 500 MHz. Comparisons with the scalar and vector instruction sets of a RISC-V processor indicate that the proposed matrix computation accelerator achieves a speedup of 50.08~143.10 and 10.25~12.36 times for matrix multiplication, 13.65~42.18 and 5.60~10.20 times for dense matrix inversion, and further improved $14.31 \sim 44.60$ and 5.89~10.76 times for sparse matrix inversion.

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Publication Details

Published
2024-10-25
DOI
https://doi.org/10.1109/icta64028.2024.10860447
Citations
1
Primary Topic
Soft Robotics and Applications
Type
article
Field-Weighted Citation Impact
0.18

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article

Specialized Accelerator for Matrix Operation in Robotic Controllers

Zhuo Zou, R.-Z. Chen, Jiajun Liu, L. Gong et al.
1 citations
Soft Robotics and Applications
0.18
article

Specialized Accelerator for Matrix Operation in Robotic Controllers

Zhuo Zou, R.-Z. Chen, Jiajun Liu, L. Gong, J. Y. Deng, Yushi Wang
article en
1 citations

Abstract

As a typical operator in robotic control scenarios, matrix operations such as matrix multiplication and matrix inversion have significantly limited the performance of robotic controllers due to high complexity. To accelerate the matrix computation, this paper conducts parallel optimization of matrix algorithms and proposes a heterogeneous matrix computation accelerator which is dynamically reconfigurable for industrial robotic control scenarios involving matrix dimensions between 4 and 9. The design is prototyped on the Xilinx FPGA VCU128 evaluation board with a clock frequency of 250 MHz and synthesized using UMC 40 nm CMOS process at 0.99 V and 500 MHz. Comparisons with the scalar and vector instruction sets of a RISC-V processor indicate that the proposed matrix computation accelerator achieves a speedup of 50.08~143.10 and 10.25~12.36 times for matrix multiplication, 13.65~42.18 and 5.60~10.20 times for dense matrix inversion, and further improved $14.31 \sim 44.60$ and 5.89~10.76 times for sparse matrix inversion.

Fudan University (CN)
Research and Development
Affordable and clean energy
Openalex Percentile: Top 49%
Soft Robotics and Applications
0.18
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