The Designing of Carbon Nanotube FET Based Encoder Using Ternary Logic

This paper introduces a novel digital circuit design utilizing a Carbon Nanotube Field-Effect Transistor (CNTFET) encoder that incorporates ternary logic gates. Unlike conventional binary logic, which uses two levels, ternary logic utilizes three distinct levels, providing notable benefits in power efficiency, speed, and circuit density. We investigate the implementation and performance of ternary logic gates such as ternary NOT, NAND, and NOR in the context of a CNTFET-based encoder. This approach leverages the unique advantages of ternary logic to surpass the performance of traditional CMOS technology. Extensive simulations conducted with Electric and HSPICE tools reveal significant improvements in both propagation delay and power consumption. The findings highlight a considerable boost in speed and energy efficiency, showcasing the potential of CNTFET technology to drive advancements in digital electronics. This study underscores the promise of integrating ternary logic with CNTFETs as pivotal for the development of future electronic devices.