An Automatic Hardware Generator for CNN Accelerator on FPGA with Efficient Resource Allocation

The field of e dge d eployment of c onvolutional neural networks (CNNs) based on field-programmable g ate a rrays (FPGAs) requires extensive knowledge and complex steps. The advent of the hls 4 ml tool has greatly simplified t his e dge deployment process. However, configuring the r euse factor p arameters within this tool still involves a very cumbersome process. In this paper, we propose an automatic reuse factor predictor based on resource predictors, latency predictors, and an automatic breadth-first search algorithm. Finally, we predict the reuse factors for a CNN with residual structures and compare them with the actual results after implementation on the Xilinx XCU250 FPGA.