Novel Split-Gate SiC MOSFETs with Fast Switching Performance
this paper presents a detailed study of the impact of distance from the Pwell boundary to the polysilicon boundary on the on-resistance, gate oxide electric field and capacitance in splitgate (SG) SiC MOSFET. Based on this analysis, the SG device is prepared, exhibiting a 49% reduction in reverse transfer capacitance $\left(\mathrm{C}_{\mathrm{rss}}\right)$ and a 14.2% reduction in gate charge $\left(\mathrm{Q}_{\mathrm{g}}\right)$ compared to the conventional planar-gate (PG) device. This improvement contributes to a reduction in losses in power electronic systems.
Authors
- Ziye Liu (ORCID: https://orcid.org/0000-0002-2936-8402)
- Zhaoxiang Wei (ORCID: https://orcid.org/0000-0002-9608-7897)
- Jiaxing Wei (ORCID: https://orcid.org/0000-0002-9896-3360)
- Xudong Zhu (ORCID: https://orcid.org/0000-0003-0110-2423)
- Siyang Liu (ORCID: https://orcid.org/0000-0001-6498-9901)
- Weifeng Sun
- Guozhi Zhen
Institutions
- Southeast University (BD)
Publication Details
- Published
- 2024-10-25
- DOI
- https://doi.org/10.1109/icta64028.2024.10860703
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00