22 nm Ultra-Low Power MCU with 43.5nW/KB Sleep Retention Power for Automotive Grade-1 Applications

With the increasing demand for edge devices, microcontroller unit (MCU) is widely utilized in Automotive Grade-1 applications with its mature architecture and ultra-low power consumption. The expansion of application scenarios imposes greater demands on operating temperature, standby power consumption and data retention time. This paper decomposes the main sources of MCU power consumption and proposes low-power design methodology, including low-leakage retention Static Random-Access Memory (SRAM) and optimized clock-tree generation scheme. The MCU is implemented using an industrial 22 nm process. Silicon results show that the hierarchical level of clock tree exhibit a 16.7% reduction compared to the standard flow. The overall SRAM leakage current decreases 59% compared with the scheme without such method. Silicon results demonstrate the operating power consumption is less than $485.92 \mu \mathrm{~W}$, and the leakage current is less than 484.8 nA in the sleep mode.