Cache-Like Dual-Port SOT-MRAM with Read-while-Write Access Strategy

Spin-orbit torque magnetic random-access memory (SOT-MRAM) attracts considerable attention for its cache-like access speed, low energy consumption, and separated read and write paths. The paper proposes a read-while-write (RWW) scheme for a dual-port SOT-MRAM to enable simultaneous read-write operations. We utilize the write voltage division on the track layer to enable 71-fJ read operation while writing in the identical bit-cell. This approach minimizes the impact of write delays on system performance and significantly enhances throughput. Simulation results conducted on an industrial 40-nm CMOS process, demonstrate a throughput improvement of over $60 \%$ in the operational mode of alternate 5-ns write and 3-ns read functionality. Assisting with write verification, the RWW scheme achieves $39 \%$ energy saving in repeated writing, as well as 98.9% access yield.