Thermal Stress and Impact Factors for the Embedded Silicon Bridge (EMIB) in a Chiplet Package

In this study, thermal stresses in critical components of an embedded silicon bridge (EMIB) within a chiplet package were analyzed using the finite element analysis (FEA). The stress impact factors, including bump diameter-to-pitch ratios, bump distribution patterns, and EMIB thickness, were investigated through stress analysis. The results reveal that the stress is allievated with a bump diameter-to-pitch ratio of 0.3, a peripheral bump distribution effectively reduces stress, and a reduction in EMIB thickness contributes to a decrease in stress. However, the number of EMIBs and their aspect ratios have a minimal impact on stress, offering design flexibility.

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Published
2024-10-25
DOI
https://doi.org/10.1109/icta64028.2024.10860427
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.00

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article

Thermal Stress and Impact Factors for the Embedded Silicon Bridge (EMIB) in a Chiplet Package

Jun Wang, Yan Chun Zhou
3D IC and TSV technologies
article

Thermal Stress and Impact Factors for the Embedded Silicon Bridge (EMIB) in a Chiplet Package

Jun Wang, Yan Chun Zhou
article en

Abstract

In this study, thermal stresses in critical components of an embedded silicon bridge (EMIB) within a chiplet package were analyzed using the finite element analysis (FEA). The stress impact factors, including bump diameter-to-pitch ratios, bump distribution patterns, and EMIB thickness, were investigated through stress analysis. The results reveal that the stress is allievated with a bump diameter-to-pitch ratio of 0.3, a peripheral bump distribution effectively reduces stress, and a reduction in EMIB thickness contributes to a decrease in stress. However, the number of EMIBs and their aspect ratios have a minimal impact on stress, offering design flexibility.

Fudan University (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 75%
3D IC and TSV technologies
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