Analysis of SiC Damage Associated With Single-Event Gate Oxide Damage

This article presents observations of silicon carbide (SiC) damage related to single-event gate oxide damage in SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) subjected to varying drain biases following heavy-ion irradiation and electrical stress. At low and medium drain biases, both surface melted and lattice damages in SiC were detected by transmission electron microscopy (TEM), while at high drain bias, crack damage propagation into the epilayer was observed directly by scanning electron microscopy (SEM). Despite the differing types of observed SiC damage, all were confined beneath the gate oxide damage or latent damage induced by heavy-ion strikes. Numerical simulations indicate that after gate oxide rupture, the formation of a gate–drain leakage path increases the current beneath the damaged oxide, leading to localized heating and subsequent SiC degradation and damage. These findings provide valuable insights for understanding the failure mechanisms of SiC MOSFETs subjected to single-event failures.

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Publication Details

Journal
IEEE Transactions on Nuclear Science
Published
2025-02-06
DOI
https://doi.org/10.1109/tns.2025.3539227
Citations
6
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
4.38

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article

Analysis of SiC Damage Associated With Single-Event Gate Oxide Damage

Yidan Tang, Xiaoli Tian, Jilong Hao, Yun Bai et al.
6 citations
IEEE Transactions on Nuclear Science
Integrated Circuits and Semiconductor Failure Analysis
4.38
article

Analysis of SiC Damage Associated With Single-Event Gate Oxide Damage

Yidan Tang, Xiaoli Tian, Jilong Hao, Yun Bai, Xinyu Liu, Yan Chen, Leshan Qiu, Zewei Dong, Jieqin Ding
article en
6 citations

Abstract

This article presents observations of silicon carbide (SiC) damage related to single-event gate oxide damage in SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) subjected to varying drain biases following heavy-ion irradiation and electrical stress. At low and medium drain biases, both surface melted and lattice damages in SiC were detected by transmission electron microscopy (TEM), while at high drain bias, crack damage propagation into the epilayer was observed directly by scanning electron microscopy (SEM). Despite the differing types of observed SiC damage, all were confined beneath the gate oxide damage or latent damage induced by heavy-ion strikes. Numerical simulations indicate that after gate oxide rupture, the formation of a gate–drain leakage path increases the current beneath the damaged oxide, leading to localized heating and subsequent SiC degradation and damage. These findings provide valuable insights for understanding the failure mechanisms of SiC MOSFETs subjected to single-event failures.

IEEE Transactions on Nuclear ScienceVol. 72(8)
Chinese Academy of Sciences (CN), Institute of Microelectronics (CN), Taiwan Semiconductor Manufacturing Company (China) (CN), University of Chinese Academy of Sciences (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 6%
Integrated Circuits and Semiconductor Failure Analysis
4.38
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Analysis of SiC Damage Associated With Single-Event Gate Oxide Damage — Yidan Tang, Xiaoli Tian, et al. · IEEE Transactions on Nuclear Science (2025) | TGRS Research Map | TGRS