A Computing In Memory Scheme Using Unipolar Switching SOT-MRAM

This paper presents an arithmetic paradigm for computing in memory (CIM) using unipolar switching spin-orbit-torque magnetic random access memory (SOT-MRAM) devices. The proposed MRAM array comprises two transistors and one SOT magnetic tunnel junction (MTJ) cell and achieves basic Boolean logic operations (AND, XOR, OR, Majority) and full-adder operations. The hybrid spintronics/CMOS simulation results show that the proposed designs improve latency and energy consumption by about $34 \% \sim 132 \%$ and $212 \% \sim \mathbf{4 8 9 \%}$ compared to the existing design, respectively. Monte Carlo simulations further prove the robustness of our design.