Research on the Application of Large Language Models in FPGA Verification Test Requirement Extraction

Focusing on the common functions in FPGA verification tests, this study adopts three different prompting strategies-standard prompting, chain-of-thought-based prompting, and example-based prompting-to evaluate the application prospects and performance of large language models (LLMs) in FPGA verification test requirement extraction. The results demonstrate that LLMs show promising application potential in the task of requirement extraction, especially when integrated with an FPGA verification test knowledge base. Among these three strategies, example-based prompting stands out, as it generates high-quality test requirements comparable to those produced by the chain-of-thought-based prompting, while also reducing the time required for strategy formulation. In contrast, standard prompting demonstrates weaker performance in the stability of requirement generation. The findings of this study strongly support the application of LLMs in the task of requirement extraction, and provide valuable insights into developing more efficient and accurate systems for extracting FPGA verification test requirements in the future.