An Energy-Efficient Logarithmic-Posit-Based In-SRAM Computing for Neural Network Acceleration

This paper proposes an SRAM-based computing-inmemory (SRAM-CIM) macro with logarithmic-posit (LP) data format for energy-efficient multiplication-and-accumulation (MAC) operations. The LP data format simplifies the multiplier to adder in the logarithmic domain while benefiting from the dynamic data expression of Posit to adapt to the tapered data distribution of neural networks (NN). Meanwhile, alignment with bit-wise exponent comparison is proposed to optimize the floating point (FP) adder tree. Experimental results show that the energy efficiency of our proposed LP-based SRAM-CIM is increased by $2.41 \times$ and $3.50 \times$ compared to previous FP-CIM works, and by $1.68 \times$ compared to previous INT-CIM work, all with comparable accuracy loss.