Performance Analysis of Parallel Prefix Adders using 90nm Technology

This paper presents a comparative analysis of delay performance in four distinct adder architectures: Brent-Kung, Ladner-Fischer, Han-Carlson, Kogge-Stone, and Ripple Carry Adder. Adders are fundamental components in digital circuits, crucial for efficient arithmetic operations in various computational systems. Each architecture employs unique design strategies to optimize carry propagation, influencing their overall speed and efficiency. The Ripple Carry Adder, with its straightforward sequential design, serves as a baseline for comparison, while the parallel-prefix architectures of Brent-Kung, Ladner-Fischer, Han-Carlson and Kogge-Stone Adders offer advanced solutions for reducing delay and improving Power-Efficiency. Through detailed simulations and analysis using Cadence Virtuoso, the Delay, Power-Efficiency and transistor count characteristics of each adder are evaluated, highlighting their strengths and tradeoffs. This study includes the design, simulation, and performance evaluation of these adder architectures using 90 nanometer technology, aiming to provide a comprehensive comparison that guides the selection of optimal adder designs for high-performance digital applications.