A 0.4–0.9 V Supply Voltage-Flexible Third-Order Passive ΔΣ Modulator With Switched-Capacitor Loop Filter Achieving 71.9 dB Peak SNDR at 4 MHz Bandwidth

This paper describes the design and implementation of a 4 MHz bandwidth <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3{^{\text {rd}}}$ </tex-math></inline-formula>-order Discrete-Time (DT) Passive Delta-Sigma Modulator (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {P\Delta\Sigma M}}$ </tex-math></inline-formula>), which avoids the use of supply voltage-sensitive linear amplifiers. The Switched-Capacitor (SC) operation and amplifier-less nature of its loop filter render the proposed modulator highly supply voltage- and clock frequency-flexible. To explain our design choices, we investigate two key design challenges unique to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {P\Delta\Sigma M}}$ </tex-math></inline-formula>s. Firstly, the noise criticality of the quantizer ADC due to the lack of (voltage) gain in the loop filter preceding it. Secondly, the inaccessibility of the readily synthesizable and highly frequency-selective loop filter frequency responses typically employed in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {\Delta\Sigma M}}$ </tex-math></inline-formula>s, caused by the absence of linear amplifiers. We show that the noise-power trade-off of the quantizer ADC in 1 bit P<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> Ms is the same as that of the first integrator amplifier in Active <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {\Delta\Sigma M}}$ </tex-math></inline-formula>. Next, we cover the suitability of several passive filters for use in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {P\Delta\Sigma M}}$ </tex-math></inline-formula> loops. This leads to the selection of the voltage-sampled Charge-Rotating IIR (CR-IIR) filter, for which we show <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {\Delta\Sigma M}}$ </tex-math></inline-formula>-oriented design equations, on which we base the design of our <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3{^{\text {rd}}}$ </tex-math></inline-formula>-order DT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {P\Delta\Sigma M}}$ </tex-math></inline-formula>. Measurement results on the resulting prototype <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {P\Delta\Sigma M}}$ </tex-math></inline-formula>, implemented in GlobalFoundries 22 nm FD-SOI CMOS, demonstrate that it achieves a 71.9 dB peak SNDR and 4 MHz bandwidth while consuming 4.4 mW from a 0.9 V supply and occupying 0.076 mm<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\mathrm {\mathbf {2}}}$ </tex-math></inline-formula> of silicon area. The prototype <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm {P\Delta\Sigma M}}$ </tex-math></inline-formula> continues to operate at a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.25\times $ </tex-math></inline-formula> reduced supply voltage of 0.4 V, albeit at a reduced bandwidth of 156.25 kHz, where it achieves a peak SNDR of 62 dB while consuming 37.8<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> W.