High-Throughput Stateless-But-Complex Packet Processing Within a Tbps Programmable Switch

Programmable switches are promising platforms for fast and flexible in-network computation; however, a standard mechanism, packet recirculation, degrades throughput due to bandwidth consumption caused by the loopback of not only packet headers but also cumbersome payloads. This paper proposes <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{P}^{4} \text{QRS}$</tex>, a mechanism for retaining payloads within the switch, reducing payload recirculations. Specifically, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{P}^{4}$</tex> QRS bifurcates packets into headers and payloads, which undergo the computation process through pipelines and the buffering process leveraging the switch's queue behavior, respectively; they then rendezvous for reassembly into complete packets to be sent out. To validate its effectiveness, we evaluated <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{P}^{4}$</tex> QRS using an analytical model and implementation on state-of-the-art hardware programmable switches. Our evaluation shows that <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{P}^{4}$</tex> QRS operates stably and intrinsically boosts complex in-switch computations.