Efficiently Implemented Logic Primitives of MUX and XOR Based on Memristors and Applications in Full-Adder Functions

Logic-in-memory (LIM) computing is expected to break the von Neumann bottleneck by performing logical operations in memory. This article presents a novel 2–1 multiplexer (MUX) scheme based on memristors that requires only two steps and three memristors. The proposed MUX logic can be executed natively in a memristor array, facilitating the construction of complex logic and arithmetic functions. Employing the proposed 2–1 MUX logic combined with <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">xor</small> logic, the 1-bit full-adder (FA) function is efficiently implemented and experimentally verified. The area and delay overheads of both serial and parallel architectures of n-bit FAs are derived, and the FA function is experimentally verified through a 4-bit carry-select adder case. Compared with IMPLY logic, the proposed FA scheme shows a significant performance improvement without sacrificing power consumption. The experimental results demonstrate the efficiency of the proposed MUX logic in accelerating FA functions, paving the way for building efficient LIM systems.