Analysis of the impact of temperature on the performance of curved surface CMOS image sensors

Curved surface CMOS image sensors (CISs) mimic the structure of the human eye’s retina, reducing optical distortion and simplifying lens design. Compared to planar sensors, the curved design introduces additional stress during the molding process and increasing working temperature, affecting the photoelectric performance and geometric shape, thereby impacting image quality. This study established a force-heat simulation model to analyze various parameters affecting the stress of curved CIS chips. Furthermore, a theoretical model for thin-film stress was established using the Stoney formula to validate the accuracy of the simulation. In the experimental phase, a pneumatic pressure three-dimensional forming technique was employed to integrate ultra-thin CIS chips onto a concave spherical substrate. The three-dimensional morphology and photoelectric performance parameters of curved and planar CIS chips were measured under high-temperature ambient conditions. The results showed that the curved CIS chips integrated on a silicon concave spherical base exhibited a three-dimensional morphology change of less than 2 µm at high temperatures (∼85 °C). Regarding photoelectric performance, the dark current of the curved CIS devices decreased by about 2DN at high temperatures. In addition, the dynamic range decreased by about 17 dB, the signal-to-noise ratio decreased by about 16.5 dB, and the read noise increased by 0.3DN, with trends and values consistent with planar devices. The above-mentioned study indicates that curved CIS devices fabricated on a silicon base can maintain their three-dimensional morphology and photoelectric performance without significant degradation under high-temperature working conditions and can operate normally.