Features of Implementation of Time-to-Digital Converters Based on FPGA (Review)

The purpose of this review is to provide researchers involved in the development of time-to-digital converters (TDC) on FPGAs with the most complete understanding of the existing approaches and methods for implementing such converters. The paper summarizes the most significant characteristics of TDCs and describes the basic time interval measurement methods used in the implementation of TDCs on FPGAs. The main problems arising in the development of such circuits are outlined. The FPGA elements on which the TDC is implemented and the procedure of TDC calibration are briefly considered. The approaches used to increase the resolution and to reduce the nonlinearity of TDC on FPGA are analyzed. Different structures of encoders used in the TDCs are considered. Based on the results of the analysis, recommendations for the development of an FPGA-based TDC are given.