Analytical modeling and TCAD simulation of surface potential and drain current for pocket doped negative capacitance field-effect transistor

Abstract In this work, a 2D analytical model for a Highly Doped Double Pocket Double Gate NCFET (HDDP-DG-NCFET) device has been developed. The proposed device HDDP-DG-NCFET comprises double gate, ferroelectric material, highly doped pockets at the edge of source-channel and drain-channel junction and spacers. The double gate and the silicon doped HfO 2 ferroelectric material provides better electrostatic control over the channel and improved subthreshold swing, respectively. The body is made more confined against the junction walls by incorporating a thin, highly doped region of a similar doping, which serves to reduce the extent of depletion regions that further increases the channel length for gate control and reduces short channel effects. Further, the device consists of spacers which increase the ON current. The HDDP-DG-NCFET provides I ON , I OFF , I ON / I OFF ratio and SS of 2.1 × 10 −3 A/ μ m, 2.65 × 10 −13 A/ μ m, 0.79 × 10 10 and 25.5 mV/decade, respectively. The framework of the model is derived from the Poisson’s equation, LK equation and solved utilizing appropriate boundary conditions. The developed model is projected for several device variables, including electric field, surface potential and drain current. Afterward, to verify the model’s accuracy, Sentaurus TCAD has been utilized for device simulation, and a good agreement with 85–95% precision is witnessed. The comprehensive and structured analysis of device is provided by examining variations in dimensions of device, ferroelectric material and oxide materials. The presented analysis shows that, the proposed HDDP-DG-NCFET device has significant potential for low power applications.