A Novel Quaternary Half Subtractor Using 2:1 Multiplexer

Multiple-valued logic (MVL) is a logic in which there are more than two truth values. MVL is used due to difficulty in interconnection problems in binary system. Carbon nanotube field-effect transistors (CNTFET) is used to design the Quaternary Half Subtractor (QHS) circuit. Sub blocks of Module (0210), Module (1021), Module (2102), Module (3210) using three supply voltage devices and Quaternary Multiplexer 2:1 using pass transistor have designed in this paper. Therefore, compared to existing designs, less no. of transistors are needed. Comparing proposed Half subtractor using 4:1 MUX modules to current one’s reveals that the 2:1 multiplexer-based method leads in lower power usage. These proposed designs have proven to work satisfactorily under a variety of operating situations, including power, delay, and power delay product (PDP).

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Publication Details

Journal
International Journal of Applied Sciences & Development
Published
2025-01-29
DOI
https://doi.org/10.37394/232029.2025.4.1
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A Novel Quaternary Half Subtractor Using 2:1 Multiplexer

Avireni Srinivasulu, P. Durga Vasavi, Cristian Ravariu, Sarada Musala
International Journal of Applied Sciences & Development
Analog and Mixed-Signal Circuit Design
article

A Novel Quaternary Half Subtractor Using 2:1 Multiplexer

Avireni Srinivasulu, P. Durga Vasavi, Cristian Ravariu, Sarada Musala
article en

Abstract

Multiple-valued logic (MVL) is a logic in which there are more than two truth values. MVL is used due to difficulty in interconnection problems in binary system. Carbon nanotube field-effect transistors (CNTFET) is used to design the Quaternary Half Subtractor (QHS) circuit. Sub blocks of Module (0210), Module (1021), Module (2102), Module (3210) using three supply voltage devices and Quaternary Multiplexer 2:1 using pass transistor have designed in this paper. Therefore, compared to existing designs, less no. of transistors are needed. Comparing proposed Half subtractor using 4:1 MUX modules to current one’s reveals that the 2:1 multiplexer-based method leads in lower power usage. These proposed designs have proven to work satisfactorily under a variety of operating situations, including power, delay, and power delay product (PDP).

International Journal of Applied Sciences & DevelopmentVol. 4
University of Bucharest (RO), Vignan's Foundation for Science, Technology & Research (IN), Universitatea Națională de Știință și Tehnologie Politehnica București (RO)
Openalex Percentile: Top 99%
Analog and Mixed-Signal Circuit Design
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A Novel Quaternary Half Subtractor Using 2:1 Multiplexer — Avireni Srinivasulu, P. Durga Vasavi, et al. · International Journal of Applied Sciences & Development (2025) | TGRS Research Map | TGRS