A 2.4 ns and 51 Fj/bit Sense Amplifier for Deep-Submicrometer Resistive Memories
Resistive Non-Volatile Memory technologies are promising candidates for bringing the non-volatility to circuits for data storage, low power consumption, high-speed access, high densities and scalability. However, because of technology scaling and lowering of supply voltage, reading yield deteriorates. To overcome these issues, a high-speed, low-power Sense Amplifier based on an original current recycling implementation and on dynamic offset cancellation is presented. It offers efficient offset compensation, analog signal amplification, fast data sensing and latching, compact area and low energy consumption.
Authors
- F. Mailly (ORCID: https://orcid.org/0000-0002-4030-0505)
- Jad Mohdad
- Pascal Nouet (ORCID: https://orcid.org/0000-0003-2137-2623)
- Thomas Falanga
Institutions
- Centre National de la Recherche Scientifique (FR)
- Université de Montpellier (FR)
- Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier (FR)
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/icecs61496.2024.10848597
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00