A 273.48 TOPS/W and 1.58 Mb/mm<sup>2</sup> Analog-Digital Hybrid CIM Processor with Transpose Ternary-eDRAM Bitcell
Deep neural network acceleration with Computing-in-Memory (CIM) processors [2–8] has been proposed to replace conventional computer architecture for high energy efficiency. However, previous CIM processors have struggled with the following limitations and challenges as shown in Fig. 1: 1) trade-off between cell density and computation linearity 2) trade-off between throughput degradation and analog-to-digital converter (ADC) area/power overheads, and 3) low system energy efficiency.
Authors
- Hoichang Jeong (ORCID: https://orcid.org/0000-0002-2391-1814)
- Keonhee Park (ORCID: https://orcid.org/0000-0003-4151-5484)
- Seungbin Kim (ORCID: https://orcid.org/0000-0002-6826-3793)
- Kyuho Lee (ORCID: https://orcid.org/0000-0002-4047-1013)
- Jeongmin Shin (ORCID: https://orcid.org/0009-0002-8049-3708)
Institutions
- Ulsan National Institute of Science and Technology (KR)
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/a-sscc60305.2024.10849108
- Citations
- 2
- Primary Topic
- Photonic and Optical Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.42
Funders
- IC Design Education Center