An Area-Efficient PVT-Dependent Adaptive Assist Termination Technique with SNM Detector for High Density SRAM

This paper presents an area-efficient assist architecture using a static noise margin (SNM) detector for high-density (HD) SRAMs that are particularly vulnerable to process variation. The SNM detector is arranged in the peripheral and composed of a logic SRAM cell with simple small logic circuits that is designed to be a replica of the least stable cell in order to reproduce the worst SNM characteristics. By using this detector, unneeded assist can be eliminated depending on PVT conditions, as a result, dramatical improvement of access time (25%) and reduction of active power (24.4% @ write and 32.8% @read) are achieved with the smallest area overhead (0.015%).