A 36 GHz to 144 GHz Frequency Upconverter Employing a Current Reuse Frequency Doubler with a Differential to Differential Transformer

This work presents a 36 GHz to 144 GHz frequency up converter, consisting of two cascaded frequency doublers. To improve efficiency and robustness, the frequency doublers are based on a current reuse principle and employe a symmetric transformer. A voltage conversion gain of 0 dB and very low phase noise are achieved while consuming only 3.2 milliwatts from a 0.9V supply. The chip is implemented in 28 nm bulk CMOS and occupies a core area of 400x190um.