High-Throughput Hardware Design for the Complete VVC Angular Intra Prediction
Versatile Video Coding (VVC) is the state-of-the-art ISO and ITU-T standard for video coding. One of the main novelties of this standard is the improved intra-frame prediction process, including the Angular Intraframe Prediction (AIP). This paper presents an efficient hardware design for the VVC AIP encoder. The designed architecture supports all prediction modes and all block sizes defined by the AIP and then it can reach the maximum possible coding efficiency. The architecture was synthesized for TSMC 40nm technology and the results show that it can process HD 1080p videos at 30 frames per second. To the best of author's knowledge, this is the first work in the literature reporting a hardware design supporting all block sizes and angular modes of the VVC AIP.
Authors
- Vinicius Borges (ORCID: https://orcid.org/0000-0002-2782-6430)
- Murilo Perleberg (ORCID: https://orcid.org/0000-0002-1398-5342)
- Luciano Agostini (ORCID: https://orcid.org/0000-0002-3421-5830)
- Marcelo Porto (ORCID: https://orcid.org/0000-0003-3827-3023)
Institutions
- Universidade Federal de Pelotas (BR)
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/icecs61496.2024.10848892
- Citations
- 3
- Primary Topic
- HVDC Systems and Fault Protection
- Type
- article
- Field-Weighted Citation Impact
- 0.63