A 0.40pJ/Spike 10μs-Latency Asynchronous Spiking Neural Network with Compact Nonideality-Tolerating CIM-Synapses for Always-On Near-Sensor AI

Spiking Neural Networks (SNNs) are suitable for always-on near-sensor AI [1]. Nevertheless, the temporal dimension complicates its IC implementation. Latency and power consumption increase with finer timing granularity in clock-driven circuits [2] [3]. A global-asynchronous local-synchronous SNN chip [4] still consumes $1.5 \mathrm{pJ} /$Spike and $100 \mathrm{~ms} / \mathrm{Inf}$. By combining SNN with Computing-In-Memory (CIM), the spike-driven Asynchronous Neuromorphic Inference Engine (ANIE) [5] has achieved fast inference ($40 \mu \mathrm{~s}$ latency). However, two major challenges exists (Fig. 1): 1) There is a lack of an end-to-end model that integrates noise-aware Feature Extraction (FE) and variation-aware inference, thereby avoiding perchip model-circuit calibrations. 2) Complex peripherals for precise signal control exist in CIM-synapses [1] [5] [6] to compensate circuit nonidealities, but degrade their efficiency.

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Publication Details

Published
2024-11-18
DOI
https://doi.org/10.1109/a-sscc60305.2024.10848713
Citations
1
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.21

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article

A 0.40pJ/Spike 10μs-Latency Asynchronous Spiking Neural Network with Compact Nonideality-Tolerating CIM-Synapses for Always-On Near-Sensor AI

Libo Qian, Lichen Feng, Hongwei Shan, Zhangming Zhu
1 citations
Advanced Memory and Neural Computing
0.21
article

A 0.40pJ/Spike 10μs-Latency Asynchronous Spiking Neural Network with Compact Nonideality-Tolerating CIM-Synapses for Always-On Near-Sensor AI

Libo Qian, Lichen Feng, Hongwei Shan, Zhangming Zhu
article en
1 citations

Abstract

Spiking Neural Networks (SNNs) are suitable for always-on near-sensor AI [1]. Nevertheless, the temporal dimension complicates its IC implementation. Latency and power consumption increase with finer timing granularity in clock-driven circuits [2] [3]. A global-asynchronous local-synchronous SNN chip [4] still consumes $1.5 \mathrm{pJ} /$Spike and $100 \mathrm{~ms} / \mathrm{Inf}$. By combining SNN with Computing-In-Memory (CIM), the spike-driven Asynchronous Neuromorphic Inference Engine (ANIE) [5] has achieved fast inference ($40 \mu \mathrm{~s}$ latency). However, two major challenges exists (Fig. 1): 1) There is a lack of an end-to-end model that integrates noise-aware Feature Extraction (FE) and variation-aware inference, thereby avoiding perchip model-circuit calibrations. 2) Complex peripherals for precise signal control exist in CIM-synapses [1] [5] [6] to compensate circuit nonidealities, but degrade their efficiency.

Xidian University (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 44%
Advanced Memory and Neural Computing
0.21
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