A 16-bit SAR ADC with Capacitor Dielectric Relaxation Effect Canceler in a 22-nm Microcontroller for Multi-Input Channel Applications
Because general-purpose microcontrollers (MCUs) handle input signals from wide variety of sensors, ADCs must support sampling frequencies of a few MHz, 16-bit resolution, and single-ended and common-free differential inputs. The ADC shown in Fig. 1(a) multiplexes input channels (CHs) to support low-cost multi-input systems, and uses oversampling techniques and digital filters to suppress noise from the CPU, RAM, ROM, and I/O. In addition, motor control applications require that the sampling skew of each CH must be suppressed. Therefore, as shown in Fig. 1(d), the input CH is switched by a multiplexer for each A/D conversion, and the output of the ADC is distributed to a digital filter dedicated to each CH by a demultiplexer. However, in such a system, the SNDR is degraded by interference with the residual signal from the previous channel due to the capacitor dielectric relaxation effect [1] [2]. The capacitor dielectric relaxation effect is a frequency-dependent change in capacitance that can be represented by a combination of several RC models. The problem is that the dielectric relaxation effect exists down to the low frequency bands in Fig. 1(b), so the speed of the ADC must be reduced, and this effect is especially significant in high accuracy ADCs.
Authors
- S. Yoshimura (ORCID: https://orcid.org/0000-0002-0602-0665)
- Tomohiko Ebata
- Cheng Yuan (ORCID: https://orcid.org/0009-0003-5086-3066)
- Tetsuo Matsui (ORCID: https://orcid.org/0000-0002-5567-3902)
- Atsushi Ochi
- Takanobu Nimiya
- Qiaoyu Wang (ORCID: https://orcid.org/0009-0002-2535-4035)
- Daiki Matsumoto
- I. Sakai
Institutions
- Renesas Electronics (Japan) (JP)
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/a-sscc60305.2024.10849003
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00