A 56Gbps ADC/DAC-Based Jitter-Robust Multicarrier Transceiver with RX MIMO-DSP for > 40dB Loss Channel

Clock jitter places fundamental performance limitations on ADC/DAC-based wireline transceivers that utilize conventional baseband amplitude modulation signaling. Alternative signaling schemes that utilize a combination of baseband and up-converted multiple carriers allow for additional coherent (amplitude/phase) modulation and provide longer symbol times to improve jitter robustness. However, channel dispersion causes both inter-symbol interference (ISI) and inter-channel interference (ICI) between signaling bands. Previous multicarrier signaling architectures have utilized relatively large carrier spacings to minimize ICI, resulting in poor spectral efficiency [1], or utilized tightly-space orthogonal carriers and performed simple off-chip ICl cancellation that only allows for operation over moderate loss channels [3]. In this work, a $56 \mathrm{~Gb} / \mathrm{s}$ multicarrier transceiver is demonstrated that enables the use of tightly-space orthogonal carriers for high-loss channels with 40.8 dB insertion loss by introducing a RX MIMO-DSP that efficiently cancels both ISI and ICI with five 5-tap FIR filters for each of the baseband, mid-band I/Q, and high-band I/Q channels compared to the work in [2] [3].