A 28nm 118.26TOPS/W Multi-Dimensional Fault-Tolerant Al Processor Enabling Voltage-Frequency Scaling Below Point-of-First-Failure

Al algorithms have succeeded tremendously, while the tremendous power from data access and computing prevents their applications [1–5]. Generally, AI computing comprises iterative memory access, sparsity processing, and MAC operations. Specifically, Al processors in each cycle fetch sparse operands from SRAM and compress nonzero data into a dense format for MAC computing. These three steps consume $\sim 90 \%$ of power. Adaptive voltage-frequency scaling (AVFS) can dynamically adjust voltage based on point-of-first-failure (PoFF). It is a promising method to achieve quadratic power saving. However, the conventional AVFS incurs severe accuracy degradation even with slight MSB errors, limiting the VF scaling boundary. 1) SRAM incurs random compulsory “0” or “1” bit errors under low voltage. Only 0.03% of errors in MSBs affect the accuracy by 29.2%. (2) The sparsity processing suffers timing violations at a low voltage. Once 1.3% of violations at the MSBs of large values occur, the accuracy decreases by 22.8%. (3) The MAC unit undergoes MSB faults at low voltage due to the LSB-to-MSB carry propagation logic, where 0.01% MSB errors degrade accuracy by 43.9%.