A 174nW Event-Driven Keyword Spotting ASIC with DC-Drift-Resilient Dual-Mode Delta/SAR Quantizer and Multiplier-Less Processor

Recently, significant progress has been achieved in low-power keyword spotting (KWS) ASICs, which can serve as always-on wake-up function blocks for computationally intensive speech processing tasks. A 3-class CNN based KWS classifier consumed 510 nW power without including on-chip ADCs [1]. In [2], an ultra-low power event-driven level-crossing (LC) ADC was employed, reducing standby power to 148 nW. However, LC-ADC is vulnerable to DC drift. Other works include a 12-class KWS chip consuming $23 \mu \mathrm{~W}$ power [3], and a skip RNN-based 7-class KWS chip consuming 1.5 $\mu \mathrm{W}$ power [4]. Despite these technological advancements, researchers are still seeking KWS solutions with even lower power consumption, while not compromising on other key specifications such as keyword variety, classification accuracy and latency.