A 24% Efficient, 15.36 dBm Output Power, Multi-Standard Digital Polar Transmitter with 7-bit Phase Interpolator-based BFSK Modulator and 23 dB Sidelobe Suppressed PA for Low-Power Wide Area Networks

The Internet of Things (IoT) has become ubiquitous, permeating all areas of modern life. In low-power wide-area IoT networks, unfiltered BFSK modulation is often adopted due to its simple and low-power hardware despite occupying significant spectrum regions in multichannel communication environments [1]–[2]. The split-channel BFSK scheme addresses this trade-off by interleaving mark or space tones of additional channels $(\mathrm{CH} 1 / \mathrm{CH} 3)$ within the desired channel (CH2) [1]. While this approach results in an efficient utilization of frequency spectrum with BFSK modulation along with an improved RX BER performance, sidelobes from adjacent channels can serve as strong interferences, thereby deteriorating the signal-tointerference ratio (SIR). To improve the degraded SIR caused by the split-channel BFSK, this work proposes a sidelobe-suppressed digital PA that effectively reduces the undesired power levels in the sidebands by employing a triangular-enveloped waveform shaping to both the mark and space tones, resulting in 13 dB additional suppression to the first sidelobes as compared to conventional BFSK modulation. Additionally, to tackle the limited data rate challenge of PLL-based modulators, an open-loop, phase-interpolator (PI)-based phase-switching BFSK modulator is adopted. Integrating phase modulation from the BFSK modulator with amplitude modulation from the DPA, the proposed polar TX can be extended to accommodate multiple loT standards requiring complex modulation schemes like BPSK and QPSK.