A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS

Sub-THz phased-array transceivers play an important role in future 6th-generation mobile communication systems (6G). In particular, the phase shifter is an essential circuit for phased-array transceivers. The phase shifter must have high-resolution phase steps and low phase error to achieve high-precision beam steering and calibration [1]. This work presents a high-precision D-band cascaded phase shifter for 6 G wireless communications. The active fine-tuning phase shifter with feedback technology realizes high-resolution phase shifting. This technology achieves over three times the fine phase shift of conventional works with lower power consumption. In addition, a compact propagation delay phase shifter using a non-uniform architecture is proposed. Thanks to this technique, a 360-degree phase shift with low phase error and reduced insertion loss is realized. The proposed phase shifter achieves a phase step of 0.1° and RMS phase error of 0.8° within the frequency range of 150-160 GHz. The power consumption is 5 mW, and the IC core area is $0.099 \mathrm{~mm}^{2}$, fabricated in a 65 nm CMOS process.

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Publication Details

Published
2024-11-18
DOI
https://doi.org/10.1109/a-sscc60305.2024.10848583
Citations
2
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.42
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article

A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS

Hiroyuki Sakai, Sungwan Park, Chenxin Liu, Atsushi Shirane et al.
2 citations
Radio Frequency Integrated Circuit Design
0.42
article

A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS

Hiroyuki Sakai, Sungwan Park, Chenxin Liu, Atsushi Shirane, Yudai Yamazaki, Kazuaki Kunihiro, A. Bahgat Shehata, Kenichi Okada, T. Uchino, Anyi Tian
article en
2 citations

Abstract

Sub-THz phased-array transceivers play an important role in future 6th-generation mobile communication systems (6G). In particular, the phase shifter is an essential circuit for phased-array transceivers. The phase shifter must have high-resolution phase steps and low phase error to achieve high-precision beam steering and calibration [1]. This work presents a high-precision D-band cascaded phase shifter for 6 G wireless communications. The active fine-tuning phase shifter with feedback technology realizes high-resolution phase shifting. This technology achieves over three times the fine phase shift of conventional works with lower power consumption. In addition, a compact propagation delay phase shifter using a non-uniform architecture is proposed. Thanks to this technique, a 360-degree phase shift with low phase error and reduced insertion loss is realized. The proposed phase shifter achieves a phase step of 0.1° and RMS phase error of 0.8° within the frequency range of 150-160 GHz. The power consumption is 5 mW, and the IC core area is $0.099 \mathrm{~mm}^{2}$, fabricated in a 65 nm CMOS process.

Tokyo Institute of Technology (JP)
Openalex Percentile: Top 35%
Radio Frequency Integrated Circuit Design
0.42
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A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS — Hiroyuki Sakai, Sungwan Park, et al. · (2024) | TGRS Research Map | TGRS