The Impact of Run-Time Variability on Side-Channel Attacks Targeting FPGAs

To defeat side-channel attacks, many recent countermeasures work by enforcing random runtime variability to the target computing platform in terms of clock jitters, frequency, and voltage scaling, and phase shift, also combining the contributions from different actuators to maximize the side-channel resistance of the target. However, the robustness of such solutions seems strongly influenced by several hyper-parameters for which an in-depth analysis is still missing. This work proposes a fine-grained dynamic voltage and frequency scaling actuator to investigate the effectiveness of recent desynchronization countermeasures with the goal of highlighting the link between the enforced runtime variability and the vulnerability to side-channel attacks of cryptographic implementations targeting FPGAs. The analysis of the results collected from real hardware allowed for a comprehensive understanding of the protection offered by runtime variability countermeasures against side-channel attacks.