On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core
Advancements in memory technology have positioned memristors at the forefront of non-volatile memory applications, necessitating precise control mechanisms to accurately program memristor cells to their respective states. This study delves into the utilization of a RISC-V processor and PWM generators to configure registers for analog conductance control of crossbar memristor array architecture for accurate voltage and current mode operations. The core contribution is the development of a flexible and efficient control algorithm specifically designed for RISC-V. A Universal Verification Methodology Framework (UVMF) testbench is employed to validate control signals, ensuring their accuracy prior to hardware implementation. Results indicate significant enhancements in control efficiency, underlining the potential for integrating RISC-V with memristor technology.
Authors
- Wei Zhao (ORCID: https://orcid.org/0000-0002-6268-2559)
- Sabitha Kusuma
- A. Ammari
- Stefan van Waasen (ORCID: https://orcid.org/0000-0003-0682-7941)
- Arun Ashok (ORCID: https://orcid.org/0000-0001-5683-4352)
- Christian Grewing (ORCID: https://orcid.org/0000-0003-1770-340X)
- André Zambanini (ORCID: https://orcid.org/0000-0002-1585-4397)
- Neethu Kuriakose
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/icecs61496.2024.10848936
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.21