FPGA Accelerated Beetle Antenna Search Derived Filter Design

Digital signal processing plays a crucial role in various applications, and Finite Impulse Response (FIR) filters are fundamental components in signal processing systems. The optimization of FIR filters is essential for achieving desired performance while minimizing computational complexity. The Beetle Antennae Search (BAS) optimization algorithm, inspired by the foraging behavior of beetles, has demonstrated its efficacy in solving complex optimization problems. This paper explores the unique characteristics of BAS, which makes it particularly well-suited for FIR filter optimization. The algorithm's decentralized and iterative nature allows it to efficiently explore the solution space, seeking optimal filter coefficients that satisfy specific design requirements. This paper proposes the design and optimization of 11-tap FIR filter algorithm on the ARM processor and its acceleration using an FPGA on the Zed Board. The real-time optimization performance of the BAS-driven FIR filter is evaluated through simulations, demonstrating the efficiency and suitability of the proposed approach for applications demanding rapid adaptability and responsiveness.