Low-Complexity Hardware Entropy Estimator for Tunable True Random Number Generators
We discuss the methodology to design a novel class of low-complexity entropy estimators, suitable for the design of tunable True Random Number Generators. We consider the generic case of non-Independent and Identically Distributed (IID) ergodic sources, investigating the effects of source memory on the estimation accuracy. The hardware implementation of the estimator has been investigated targeting a Xilinx Artix 7 FPGA.
Authors
- Valerio Vignoli (ORCID: https://orcid.org/0000-0003-2509-6566)
- Tommaso Addabbo (ORCID: https://orcid.org/0000-0003-0168-9404)
- Ada Fort (ORCID: https://orcid.org/0000-0003-0916-1516)
- Filippo Spinelli (ORCID: https://orcid.org/0009-0009-4174-5694)
Institutions
- University of Siena (IT)
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/icecs61496.2024.10848733
- Primary Topic
- Chaos-based Image/Signal Encryption
- Type
- article
- Field-Weighted Citation Impact
- 0.00