Open-Source FPGA Implementation of an I3C Controller

Multiple serial interfaces have emerged to meet system requirements across devices, ranging from slower-speed buses, such as I2C, to high throughput serial interfaces, like JESD204. To address the need for a medium-speed protocol and to resolve I2C shortcomings, the MIPI Alliance developed the I3C specification, which is a royalty-free next-generation version of I2C with new features and backward compatibility. Since the MIPI Alliance’s I3C work only includes the specifications, it depends on third-party vendors to develop their own cores according to the specifications. Only a few processing systems contain I3C Controllers, each with its own partial implementation of the specification, and there are no open-source controller cores. Thus, this work presents an open-source I3C Controller HDL framework that operates at the maximum specified SDR frequency and is compatible with the Linux kernel. Both the core and Linux kernel drivers are available under permissive open-source licenses. The solution is mostly aimed at development boards with Xilinx Zynq and Intel Cyclone SoC; nevertheless, the structure of the project allows it to be ported to other vendors and carriers.