Leveraging FPGA-based System-on-Chip for Real-time Sensor Data Hosting in IoT

FPGA technology-driven System on Chip (SoC) has made significant strides in managing sensor data in the Internet of Things (IoT) because of the XADC embedded capabilities, which have eliminated the need for external ADCs, resulting in power-efficient operation, improved operational efficiency, reduced footprint and the reduction of data processing delay that the real-time cloud communication would have caused. The implemented module was practically analyzed with the assistance of the sensors to check the effectiveness of the proponent’s methodology. Likewise, the FPGA design held 1.90% LUTs with processor segment including only 1.40% SoC; the model was tested with a temperature sensor showing the static and dynamic power consumption of 122mW and 6.42mW, respectively with ±0.5 error. The experiment was carried out on the ZedBoard Zynq-7000 Development Board to show the efficacy of the proposed scheme.

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Publication Details

Published
2024-10-24
DOI
https://doi.org/10.1109/iemecon62401.2024.10846196
Citations
2
Primary Topic
IoT and Edge/Fog Computing
Type
article
Field-Weighted Citation Impact
0.70
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article

Leveraging FPGA-based System-on-Chip for Real-time Sensor Data Hosting in IoT

Bipin Chandra Mandi, Vijay Kumar Gupta, Satnam Singh
2 citations
IoT and Edge/Fog Computing
0.70
article

Leveraging FPGA-based System-on-Chip for Real-time Sensor Data Hosting in IoT

Bipin Chandra Mandi, Vijay Kumar Gupta, Satnam Singh
article en
2 citations

Abstract

FPGA technology-driven System on Chip (SoC) has made significant strides in managing sensor data in the Internet of Things (IoT) because of the XADC embedded capabilities, which have eliminated the need for external ADCs, resulting in power-efficient operation, improved operational efficiency, reduced footprint and the reduction of data processing delay that the real-time cloud communication would have caused. The implemented module was practically analyzed with the assistance of the sensors to check the effectiveness of the proponent’s methodology. Likewise, the FPGA design held 1.90% LUTs with processor segment including only 1.40% SoC; the model was tested with a temperature sensor showing the static and dynamic power consumption of 122mW and 6.42mW, respectively with ±0.5 error. The experiment was carried out on the ZedBoard Zynq-7000 Development Board to show the efficacy of the proposed scheme.

Indian Institute of Technology Guwahati (IN), Indian Institute of Information Technology Guwahati (IN), Indian Institute of Information Technology, Nagpur (IN), International Institute of Information Technology
Openalex Percentile: Top 25%
IoT and Edge/Fog Computing
0.70
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