Defect Modeling for Pre-bond TSV Considering Testing Frequency

To guarantee the yield of 3D-ICs, TSVs need to be tested before die bonding process. An accurate pre-bond TSV defect model is the foundation of defect testing. Conventional pre-bond TSV defect models do not consider the defect characteristics under different frequencies, which leads them not accurate enough for practical application. In this paper, we proposed pre-bond TSV RLGC equivalent lumped defect models for void, open, and pinhole defects considering testing frequency. The validity of the defect models have been proved by theoretical equations, practical measurement and Q3D simulations.

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Publication Details

Published
2024-09-20
DOI
https://doi.org/10.1109/iccs62517.2024.10845959
Citations
1
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.21

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article

Defect Modeling for Pre-bond TSV Considering Testing Frequency

Xiaofeng Zhao, Fang Xu
1 citations
3D IC and TSV technologies
0.21
article

Defect Modeling for Pre-bond TSV Considering Testing Frequency

Xiaofeng Zhao, Fang Xu
article en
1 citations

Abstract

To guarantee the yield of 3D-ICs, TSVs need to be tested before die bonding process. An accurate pre-bond TSV defect model is the foundation of defect testing. Conventional pre-bond TSV defect models do not consider the defect characteristics under different frequencies, which leads them not accurate enough for practical application. In this paper, we proposed pre-bond TSV RLGC equivalent lumped defect models for void, open, and pinhole defects considering testing frequency. The validity of the defect models have been proved by theoretical equations, practical measurement and Q3D simulations.

Heilongjiang University (CN)
Natural Science Foundation of Heilongjiang Province
Openalex Percentile: Top 44%
3D IC and TSV technologies
0.21
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