A 13-bit low-power SAR ADC with a modified bottom-plate switching strategy based on split capacitor

In this paper, a 13-bit high-precision low-power SAR ADC is proposed. Compared with the conventional common-mode voltage-based switching strategy, the proposed improved split-capacitor switching strategy effectively saves the design of the common-mode voltage reference circuit and the drive circuit, thus reducing the power consumption. In order to ensure the sampling accuracy, the switching strategy is changed from the conventional top plate switching strategy to the bottom plate switching strategy, which reduces the charge injection effect associated with the input. Based on TSMC 65nm CMOS process, a 13-bit 20MS/s SAR ADC is designed to validate the proposed technique, and the schematic design and layout design are completed with a layout area of 124.69um*159.31um.The post-simulation results show that, under the conditions of supply voltage and reference voltage of 1.2V and sampling frequency of 20MHz, the signal-to-noise distortion ratio (SNDR) reaches 80.618dB, the spurious-free dynamic range (SFDR) reaches 95.798dB, and the power consumption of the analog circuit part is 196uW.