A Regulated Charge Pump-Based Pulse Driver Achieving Fast Dual-Edge Transition

High-voltage(HV) pulse drivers are widely required in MEMS actuators. This paper presents a fully integrated charge-pump(CP)–based HV pulse driver using pulse-frequency modulation (PFM) to accelerate dual-edge transition. A chopper, synchronized with the pulse control signal, is utilized to establish closed-loop regulation during both the charging and discharging phases. Unlike other published designs, this work effectively reduces both rise and fall times without compromising the CP’s drive capability. This work is designed in a standard 65nm bulk CMOS process. This driver can generate >10 V pulse output from a 2.5 V supply for a 15 pF // 50 kΩ load at 100 kHz, achieving a rise time of 407 ns and a fall time of 966 ns. It reduces 58% in rise time and 16% in fall time, respectively. While there is a trade-off between speed and power efficiency, the efficiency penalty diminishes with lower driving frequencies, ultimately improved efficiency can be achieved due to low-frequency operation during the discharging phase.

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Publication Details

Published
2024-09-20
DOI
https://doi.org/10.1109/iccs62517.2024.10846147
Primary Topic
Particle accelerators and beam dynamics
Type
article
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article

A Regulated Charge Pump-Based Pulse Driver Achieving Fast Dual-Edge Transition

Min Tan, Ziliang Zhou
Particle accelerators and beam dynamics
article

A Regulated Charge Pump-Based Pulse Driver Achieving Fast Dual-Edge Transition

Min Tan, Ziliang Zhou
article en

Abstract

High-voltage(HV) pulse drivers are widely required in MEMS actuators. This paper presents a fully integrated charge-pump(CP)–based HV pulse driver using pulse-frequency modulation (PFM) to accelerate dual-edge transition. A chopper, synchronized with the pulse control signal, is utilized to establish closed-loop regulation during both the charging and discharging phases. Unlike other published designs, this work effectively reduces both rise and fall times without compromising the CP’s drive capability. This work is designed in a standard 65nm bulk CMOS process. This driver can generate >10 V pulse output from a 2.5 V supply for a 15 pF // 50 kΩ load at 100 kHz, achieving a rise time of 407 ns and a fall time of 966 ns. It reduces 58% in rise time and 16% in fall time, respectively. While there is a trade-off between speed and power efficiency, the efficiency penalty diminishes with lower driving frequencies, ultimately improved efficiency can be achieved due to low-frequency operation during the discharging phase.

Huazhong University of Science and Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 56%
Particle accelerators and beam dynamics
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