A Dynamic Logic Based Reconfigurable Digital CIM Macro for Edge Computing

The imperative for energy efficiency in Artificial Intelligence (AI) aligns with global environmental sustainability goals, presenting substantial challenges. Compute-in-memory (CIM) offers a viable solution for edge computing, capitalizing on its superior energy efficiency and bandwidth. Yet, the specialized nature of CIM hardware impedes its broader adoption in AIoT applications. This study introduces a dynamically reconfigurable digital CIM leveraging dynamic logic to enhance energy efficiency. Dynamic logic reduces transistor count and transmission delay compared to static logic, thereby augmenting the energy efficiency ratio. It features a reconfigurable Manchester carry chain for adaptable computation across different data bit-widths and incorporates reusable computation units supporting seven operator types, minimizing circuit area. Evaluation using TSMC 40-nm CMOS technology demonstrates that the proposed macro circuit operates at 800 MHz at 1.1 V, achieving energy efficiencies of 0.76 TOPS/W for 8-bit multiplication and 4.22 TOPS/W for 8-bit addition at 0.8 V. Emulation of neural networks (NNs) within the AIoT framework demonstrates that a significant number of computational cycles can be executed using a minimal set of instructions.