Back-End-of-Line Compatible 2T1C Memory Cell With InGaZnO Thin-Film Transistors and Hf₀.₅Zr₀.₅O₂-Based Ferroelectric Capacitors

Back-end-of-line (BEOL) compatible and high-performance thin-film transistors (TFTs) and emer- ging memory devices trigger significant interest in their integration into 3-D computing and memory systems. In this work, we demonstrate, for the first time, the fully integrated 2T1C memory cells with InGaZnO TFTs and Hf0.5Zr0.5O2 (HZO)-based ferroelectric capacitors (FeCaps). The write and read operations of this recently pro- posed ferroelectric memory structure were systematically studied. The impacts of critical parameters on device per- formances were elucidated, including 1) applied voltage; 2) ferroelectric remnant polarization (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{\text {r}}$ </tex-math></inline-formula>); 3) transistor threshold voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {th}}$ </tex-math></inline-formula>); and 4) area ratio (AR) between the FeCap and the MOS capacitor of the Read transistor. The device with an AR of 1:8 can be operated with low voltages of 2 V for write and 2.5 V for read. Finally, the reliabilities of our fabricated 2T1C memory cells including retention (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\geqq 10^{{5}}$ </tex-math></inline-formula> s) and endurance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\geqq 10^{{7}}$ </tex-math></inline-formula> cycles) were experimentally characterized.