Implementation of a Multi-Target DRFM System Based on FPGA

With the development of electronic warfare in modern combat, Digital Radio Frequency Memory (DRFM) technology has assumed an increasingly important role due to its ability to interfere with enemy radar and protect friendly forces from being tracked. This paper proposes a DRFM design based on Field-Programmable Gate Array (FPGA) technology and the AD9361 agile RF transceiver. This simulator achieves multi-target echo simulation through multi-stage delay and applies Doppler shift and amplitude scaling to the outputs.