MIMO Transceiver with Ultra-Power-Efficient Analog-Based Processing Toward Tbps Wireless Communication

As the demand for higher data rates continues to grow, achieving terabit-per-second (Tbps) wireless communication has become a critical goal for next-generation networks. However, conventional digital systems struggle to efficiently utilize the ultra-wide bandwidths required for Tbps communication. Specifically, the power consumption of ultrafast, high-precision analog-to-digital converters (ADCs) for such wide bandwidths becomes impractical. This challenge is even more pronounced in traditional fully digital receiver designs for multiple-input multiple-output (MIMO) technology, where each receiver antenna commonly necessitates at least one separate ADC. To address these challenges, we propose two analog-based, ADC-less approaches for MIMO receiver design. In our first approach, an analog combiner leverages the gains of each fading channel path by selecting the one with the maximum signal-to-noise ratio (SNR). Channel equalization and detection are then performed in the analog domain to calculate the log-likelihood ratio (LLR). In the second approach, we introduce procedures to estimate the channel phase in the analog domain and propose an analog equivalent of a maximum ratio combining (MRC) combiner. The equalizer block is implemented separately due to the phase estimation of the down-converted channel. Our proposed methods achieve the performance of their counterpart digital approaches while offering more than $41 \times$ power savings.