A High-Speed, Low-Power Analog Integrated Artificial Neural Network for Parkinson's Disease Classification

This paper presents a methodology for implementing low-power, high-speed artificial neural network based on analog hardware architecture. The key components include current-mode circuits, such as the Gaussian function, Sigmoid function, current correlator, and current mirrors and a current-mode comparator for the final decision. The architecture operates efficiently at 875nW with a low power supply of 0.6V. Tested on real-world Parkinson's disease classification tasks, it achieves over 94.8% accuracy. Implemented in a 90 nm TSMC CMOS process and developed with the Cadence IC Suite, the design is validated through Monte Carlo and corner analysis, confirming its robustness compared to software-based classifiers and existing literature.