Characterization Of Short-Circuit Failure Mode of Si/SiC Hybrid Devices

With the advancement of wide-bandgap semiconductor technology, SiC MOSFETs are increasingly used in power electronics due to their high breakdown strength and excellent thermal conductivity. However, SiC MOSFETs face limitations in short-circuit withstand capability and cost. To address this, hybrid parallel devices combining Si IGBT and SiC MOSFETs have been proposed to balance performance and cost. This paper investigates the impact of gate and bus voltages on short-circuit failure time in Si/SiC hybrid devices through testing. The results show that as gate and bus voltages increase, short-circuit failure time significantly decreases, while adjusting the current ratio has minimal effect. This study provides experimental data supporting the reliability evaluation of Si/SiC hybrid devices and offers insights for future device optimization and short-circuit protection design.