Hardware Generation on Trigonometric Functions

This paper presents hardware generation for accelerating various floating-point (FP) trigonometric functions, including sine, cosine, and arctangent. The Chisel Hardware Construction Language (HCL) is used to develop parameterized and flexible designs for these functions. The hardware generator supports multiple design architectures with configurable parameters, such as precision (e.g., 16-bit, 32-bit, 64-bit, and 128-bit), iteration count, and pipeline depth, allowing for customization of hardware resource utilization, latency, speed, and accuracy.