A Low-Noise High-Photon Detection Efficiency Silicon Photomultiplier in 0.11-<i>μ</i>m CMOS

Silicon photomultipliers (SiPMs) fabricated using standard CMOS processes offer the advantages of compatibility with on-chip digital circuits, making them promising candidates among low-photon flux sensors. However, the high noise and low-photon detection efficiency (PDE) of CMOS SiPMs have limited their widespread adoption. Here, we present a novel SiPM obtained within a standard 0.11-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> m CMOS process. We report how guard ring (GR) width and distance from shallow trench isolation (STI) may affect the noise performance, and we optimize for them. The final device demonstrates performance that is competitive with both custom-based commercial technologies and other CMOS-based SiPMs, featuring an unprecedented peak PDE of 62% at 420 nm, a dark count rate (DCR) of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {\text {(}{174}\pm {7}\text {)}}$ </tex-math></inline-formula> kcps/mm<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {^{{2}}}$ </tex-math></inline-formula>, a gain of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {\text {(}{2}.{0}\pm {0}.{2}\text {)}\times {10}^{{6}}}$ </tex-math></inline-formula> and a single-photon time resolution (SPTR) of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {\text {(}{74}\pm {3} \text {)}}$ </tex-math></inline-formula> ps [full width at half maximum (FWHM)] at an excess bias voltage of 3 V.