LOGARITHMIC ANALOG-DIGITAL CONVERTERS. REVIEW

In this work, a review of logarithmic analog-to-digital converters (LADCs) was carried out and an analysis of their properties in the dynamic range of input signals of 80 dB was carried out. It is shown that the highest metrological characteristics are obtained by LADCs on switched capacitors (CC) using high-quality analog switches from Maxima and Analog Devices companies, in which parasitic interelectrode capacitances do not exceed 1 pF. LADC of different classes were considered. Serial LADCs on CC have the lowest speed, they are performed with redistribution or accumulation of charge (RC or AC) in capacitor cells, in which switching is carried out with analog switches; in such LADCs, the conversion error can be reduced to 0.25% (taking into account the quantization error of 0.1%) with a conversion time of no more than 20 ms. The same speed has LADC with pulse feedback, the conversion error of which is almost completely determined by the value of the quantization error for values ​​of the last 0.1% and more. Interpolation LADCs make it possible to reduce the conversion error below 0.1% with a conversion time of the order of hundreds of microseconds. Medium-speed LADCs with a conversion time of 100 μs or less include subband, recurrent, and bit-by-bit, which achieve a conversion error of 0.005%, 0.0015%, and 0.0015%, respectively. High-speed LADCs are parallel, their conversion error does not exceed 0.4% with a conversion time of less than 10 ns. Key words: logarithmic ADCs, construction, characteristics, parameters