FGMOS Based Low Power Analog Subtractor
In this paper, we propose a novel low-power Floating Gate MOSFET (FGMOS)-based analog subtractor designed for bio-signal processing applications. Simulations demonstrate exceptionally low static power dissipation (around 323.25 μW) due to FGMOS technology. The subtractor functions well with bio-signal frequencies (1–100 Hz) and offers a usable bandwidth (16.59 kHz) with minimal distortion (Total Harmonic Distortion < 0.05% for small signals). The noise profile (22.8 nV/ Hz at low frequencies, −14.37 dB/decade roll-off) aligns with biomedical application requirements. These findings highlight the FGMOS subtractor as a compelling building block for low-power, high-performance bio-instrumentation, with future work exploring further power reduction or wider bandwidth for broader ap-plicabllity.
Authors
- Urvashi Bansal
- Nishant Mehta
- Unnati Chandrakant Mehta
Institutions
- Netaji Subhas University of Technology (IN)
Publication Details
- Published
- 2024-10-24
- DOI
- https://doi.org/10.1109/iccsc62048.2024.10830319
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00